- Schematic: 12 components, 10 nets, ERC 0 (MCP batch_add_components + connect_to_net) - Board: 20x30mm 2-layer, JLCPCB DRC rules (0.15mm clearance) - Placement: U1 SN65HVD230 center, J1 CAN bus right, J2 power left, split termination below - Routing: Freerouting headless CLI, 44 tracks, 1 via, 13/14 nets routed - GND copper pour F.Cu+B.Cu, 20 stitching vias, collision-checked - DRC: 8 violations (3 courtyard overlap + 5 silk edge clearance - cosmetic only) - Gerbers exported (8 layers + drill) - SVG exported for review
211 lines
4.3 KiB
Plaintext
211 lines
4.3 KiB
Plaintext
(session "can-bus-transceiver"
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(base_design "can-bus-transceiver")
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(placement
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(resolution um 10)
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(component "TerminalBlock_CUI:TerminalBlock_CUI_TB007-508-02_1x02_P5.08mm_Horizontal"
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(place J1 170000 -150000 front 0)
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)
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(component "Resistor_SMD:R_0603_1608Metric"
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(place R1 60000 -90000 front 0)
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(place R2 60000 -210000 front 0)
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(place R5 130000 -210000 front 0)
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(place R3 50000 -120000 front 0)
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(place R4 130000 -90000 front 0)
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)
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(component "Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical"
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(place J2 30000 -150000 front 0)
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)
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(component "Capacitor_SMD:C_0603_1608Metric"
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(place C1 100000 -260000 front 0)
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)
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(component "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm"
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(place U1 100000 -150000 front 0)
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)
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)
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(was_is
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)
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(routes
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(resolution um 10)
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(parser
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(host_cad "KiCad's Pcbnew")
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(host_version "10.0.2")
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)
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(library_out
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(padstack "Via[0-1]_600:300_um"
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(shape
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(circle F.Cu 6000 0 0)
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)
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(shape
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(circle B.Cu 6000 0 0)
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)
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(attach off)
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)
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(padstack "Via[0-1]_600:300_um"
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(shape
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(circle F.Cu 6000 0 0)
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)
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(shape
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(circle B.Cu 6000 0 0)
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)
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(attach off)
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)
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)
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(network_out
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(net CANL
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(wire
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(path F.Cu 2000
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51750 -90000
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51225 -90525
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51225 -129909
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)
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)
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(wire
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(path B.Cu 2000
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170000 -150000
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149909 -129909
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51225 -129909
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)
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)
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(via "Via[0-1]_600:300_um" 51225 -129909
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)
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(wire
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(path F.Cu 2000
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124750 -156350
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163650 -156350
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170000 -150000
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)
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)
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)
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(net "TERM_L"
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(wire
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(path F.Cu 2000
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92253 -94017
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88236 -90000
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68250 -90000
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)
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)
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(wire
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(path F.Cu 2000
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51750 -210000
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92253 -169497
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92253 -94017
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)
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)
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(wire
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(path F.Cu 2000
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92253 -94017
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104377 -81893
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130143 -81893
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138250 -90000
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)
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)
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)
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(net "3V3"
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(wire
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(path F.Cu 2000
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47509 -144008
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41750 -138250
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41750 -120000
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)
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)
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(wire
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(path F.Cu 2000
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75250 -156350
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59850 -156350
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47509 -144008
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)
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)
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(wire
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(path F.Cu 2000
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41517 -150000
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47509 -144008
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)
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)
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(wire
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(path F.Cu 2000
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30000 -150000
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41517 -150000
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)
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)
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)
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(net GND
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(wire
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(path F.Cu 2000
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37783 -175400
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50483 -162700
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85047 -162700
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88236 -159511
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88236 -152182
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79704 -143650
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75250 -143650
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)
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)
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(wire
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(path F.Cu 2000
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107750 -260000
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99483 -268267
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87886 -268267
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37783 -218164
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37783 -175400
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)
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)
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(wire
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(path F.Cu 2000
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37783 -175400
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30000 -175400
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)
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)
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(wire
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(path F.Cu 2000
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138250 -210000
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107750 -240500
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107750 -260000
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)
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)
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)
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(net "TERM_H"
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(wire
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(path F.Cu 2000
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84116 -210000
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96270 -197846
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96270 -115480
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121750 -90000
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)
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)
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(wire
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(path F.Cu 2000
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92250 -260000
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92250 -218134
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84116 -210000
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)
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)
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(wire
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(path F.Cu 2000
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84116 -210000
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68250 -210000
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)
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)
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)
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(net Rs
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(wire
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(path F.Cu 2000
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121750 -210000
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111810 -200060
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111810 -140136
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120996 -130950
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124750 -130950
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)
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)
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)
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(net D
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(wire
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(path F.Cu 2000
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75250 -130950
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69200 -130950
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58250 -120000
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)
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)
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)
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)
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)
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) |