2 Commits

Author SHA1 Message Date
5c40f851d2 Fix schematic: restore all wire connections, separate 3V3 from GND
- Re-connected all pins using pin-snapped connect_to_net (U1, U2, U3, J1, Q1, all passives)
- Fixed: 3V3 was shorted to GND by overlapping labels 0.47mm apart
- Replaced batch_connect labels (off-grid) with pin-exact connect_to_net labels
- Verified: 15 clean nets with no GND/3V3 contamination
- Nets: 3V3, CC1, CC2, CFG1, CFG2, EN, GATE, IO0, USB_DN, USB_DP,
        VBUS, VBUS_SENSE, VDD_CH224, VOUT, GND
2026-06-20 17:47:37 +03:00
f2d64ccf04 Fix schematic syntax & finalize ERC
- Fixed: double-empty-string bug () in power symbol Footprint properties
- Fixed: single-line 67KB file was unparseable by KiCad - properly pretty-printed to 4408 lines
- Added: 42 no-connect flags for unused pins (J1 SBU, ESP32 GPIOs, NC resistors)
- Added: PWR_FLAG and GND power symbols connected to nets
- Added: batch_connect wiring for passives (C1-C5, R1-R7)
- Snap-to-grid: 152 elements aligned to 1.27mm grid
- Board sync: 13 footprints added, 16 nets confirmed
- Custom CH224K symbol verified and committed
2026-06-20 17:40:26 +03:00