nearxos/USB_PD_ESP32S3
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nearxos 2dd1c727ef Full Freerouting rebuild with J1 at 270° correct orientation 
- Stripped board, re-ran Freerouting v2.2.4 (200 passes)
- 25/25 nets routed (989 score, only VBUS_SENSE needed manual routing)
- 99 GND stitching vias (grid + IC-dense)
- VBUS_SENSE routed on B.Cu (U2.10 -> Q1.2)
- DRC: 223 violations (all GND-zone dependent — resolve on fill)
- Placement final: J1(270°) at edge, clean orthogonal routing throughout
2026-06-21 16:43:17 +03:00
.gitignore
Fix J1 to 180°, move R6/R7/R8/C5 away from ESP32, orthogonal 3V3/3V3_ESR/EN routing on B.Cu
2026-06-21 16:25:44 +03:00
sym-lib-table
USB-C PD board with ESP32-S3
2026-06-20 17:31:20 +03:00
untitled-erc.rpt
Fix schematic syntax & finalize ERC
2026-06-20 17:40:26 +03:00
USB_PD_ESP32S3_drc_violations.json
Rebuild: fix J1 orientation (90°), re-place all components, Freerouting orthogonal routing, 84 GND vias
2026-06-21 12:19:07 +03:00
USB_PD_ESP32S3-erc.rpt
Fix schematic: restore all wire connections, separate 3V3 from GND
2026-06-20 17:47:37 +03:00
USB_PD_ESP32S3.kicad_pcb
Full Freerouting rebuild with J1 at 270° correct orientation
2026-06-21 16:43:17 +03:00
USB_PD_ESP32S3.kicad_prl
Fix J1 orientation to 90° — mating face now faces left board edge
2026-06-21 16:33:47 +03:00
USB_PD_ESP32S3.kicad_pro
Add R9 (0.47R ESR for LD1117 stability) + R10 (22R gate resistor) + optimize placement
2026-06-21 09:10:57 +03:00
USB_PD_ESP32S3.kicad_sch
Add R9 (0.47R ESR for LD1117 stability) + R10 (22R gate resistor) + optimize placement
2026-06-21 09:10:57 +03:00
USB_PD_ESP32S3.kicad_sym
USB-C PD board with ESP32-S3
2026-06-20 17:31:20 +03:00
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