6.4 KiB
6.4 KiB
Trace Width Guide: Power Distribution
Date: 2025-12-28
Based on: ESP32-WROOM-32E, AMS1117-3.3, TXB0104PWR
Current Requirements Summary
3.3V Power Rail
- ESP32 peak current: 500mA (WiFi transmission)
- LEDs (2×): ~12mA
- TXB0104 VCCA: 5µA (negligible)
- Pull-up resistors: <0.1mA (negligible)
- Total peak current: ~512mA
5V Power Rail
- TXB0104 VCCB: 5µA (negligible)
- AC Connector: Minimal (if just signaling)
- Total current: ~10mA (very low)
Trace Width Calculations
IPC-2221 Standard Reference
Current Carrying Capacity (10°C temperature rise):
| Copper Weight | Layer Type | Capacity |
|---|---|---|
| 1oz (35µm) | External (F.Cu/B.Cu) | ~1.0A per 1mm width |
| 1oz (35µm) | Internal | ~0.5A per 1mm width |
| 2oz (70µm) | External | ~2.0A per 1mm width |
| 2oz (70µm) | Internal | ~1.0A per 1mm width |
Recommended Trace Widths
For Standard 1oz Copper PCB (Most Common)
3.3V Power Traces
Minimum Requirements:
- External layer: 0.51mm (for 512mA)
- Internal layer: 1.02mm (for 512mA)
Recommended (with safety margin):
- External layer: 1.0mm (50% margin, easy to route)
- Internal layer: 1.5mm (50% margin)
Best Practice:
- Main power rail: Use 1.0mm to 1.5mm wide traces
- Branch traces: Can be narrower (0.5mm) for short runs to components
- Copper zones/pours: Even better for power distribution
5V Power Traces
Minimum Requirements:
- Any layer: 0.01mm (for 10mA) - theoretical minimum
Recommended:
- Standard signal width: 0.3mm (sufficient and standard)
- Main rail: 0.5mm (if using dedicated trace)
Note: 5V current is very low, so trace width is not critical. Use standard signal trace width (0.2-0.3mm) or slightly wider (0.5mm) for main rail.
Detailed Recommendations
3.3V Power Distribution
Option 1: Wide Traces (Recommended)
Main 3.3V rail: 1.0mm - 1.5mm width
Branch to ESP32: 0.8mm - 1.0mm width
Branch to LEDs: 0.3mm - 0.5mm width
Branch to TXB0104: 0.3mm - 0.5mm width
Option 2: Copper Zones/Pours (Best Practice)
- Create a 3.3V copper zone covering the board area
- Provides lowest impedance
- Best for power distribution
- Use 1.0mm clearance from other nets
Option 3: Hybrid Approach
- Main rail: 1.5mm wide trace from regulator to ESP32 area
- Copper zone: 3.3V zone around ESP32 and other components
- Branch traces: 0.5mm for short connections
5V Power Distribution
Main 5V rail: 0.3mm - 0.5mm width (sufficient)
Branch to TXB0104: 0.3mm width (standard)
Branch to AC Conn: 0.3mm width (standard)
Note: 5V current is so low that trace width is not a concern. Use standard signal trace widths.
Implementation Guidelines
For KiCad PCB Layout
Setting Up Trace Widths
-
Design Rules Setup:
- Go to:
File → Board Setup → Design Rules → Net Classes - Create net classes:
Power_3V3: Min width 0.5mm, Preferred 1.0mm, Max 2.0mmPower_5V: Min width 0.2mm, Preferred 0.3mm, Max 1.0mmSignal: Min width 0.2mm, Preferred 0.2mm, Max 0.5mm
- Go to:
-
Assign Net Classes:
+3.3Vnet →Power_3V3class+5Vnet →Power_5Vclass- All other nets →
Signalclass
-
Routing:
- Route power traces first (widest)
- Use copper zones for power distribution where possible
- Keep power traces short and direct
Trace Width by Location
| Location | 3.3V Width | 5V Width | Notes |
|---|---|---|---|
| Regulator output | 1.0-1.5mm | - | Main power source |
| To ESP32 VDD | 1.0mm | - | High current path |
| To TXB0104 VCCA | 0.5mm | - | Low current |
| To LEDs | 0.3-0.5mm | - | Low current |
| To pull-ups | 0.2-0.3mm | - | Very low current |
| 5V main rail | - | 0.3-0.5mm | Low current |
| To TXB0104 VCCB | - | 0.3mm | Very low current |
Copper Zone Recommendations
3.3V Copper Zone
- Layer: F.Cu or B.Cu (or both)
- Clearance: 0.5mm from other nets
- Min width: 0.5mm (for narrow areas)
- Coverage: Around ESP32, regulator, and power distribution area
GND Copper Zone
- Layer: Both F.Cu and B.Cu (ground plane)
- Clearance: 0.3mm from other nets
- Coverage: Entire board (ground plane)
- Vias: Connect both layers with multiple vias
5V Copper Zone (Optional)
- Not necessary due to very low current
- Can use if board space allows
- Width: 0.3mm minimum if used
Thermal Considerations
Power Dissipation
- 3.3V @ 512mA: ~1.69W (ESP32 peak)
- Trace resistance: Lower with wider traces
- Voltage drop: Minimize with wide traces and short paths
Trace Heating
With 1.0mm trace width and 512mA:
- Temperature rise: ~10°C (acceptable)
- Voltage drop: <50mV for typical trace lengths
Design Checklist
- 3.3V main rail: 1.0mm minimum (1.5mm preferred)
- 3.3V to ESP32: 1.0mm minimum
- 3.3V branches: 0.5mm minimum for short runs
- 5V traces: 0.3mm minimum (standard signal width)
- Ground plane: Full coverage on one or both layers
- Power zones: Consider copper zones for 3.3V
- Vias: Use multiple vias for layer transitions on power nets
- Clearance: Maintain proper clearance from other nets
Quick Reference
Minimum Trace Widths (1oz copper, external layer)
| Net | Current | Minimum | Recommended |
|---|---|---|---|
| +3.3V | 512mA | 0.51mm | 1.0mm |
| +5V | 10mA | 0.01mm | 0.3mm |
| GND | - | - | Ground plane |
| Signals | <10mA | 0.2mm | 0.2mm |
Summary
- 3.3V traces: Use 1.0mm width (or copper zone)
- 5V traces: Use 0.3mm width (standard signal width)
- GND: Use ground plane (copper zone covering entire board)
Additional Notes
Why 1.0mm for 3.3V?
- Provides 50% safety margin over minimum requirement
- Easy to route and manufacture
- Low voltage drop
- Good thermal performance
- Standard practice for power traces
Why 0.3mm for 5V?
- Current is very low (10mA)
- Standard signal trace width
- Easy to route
- Sufficient for the application
Copper Zones vs Traces
- Copper zones: Best for power distribution (lowest impedance)
- Traces: Good for point-to-point connections
- Hybrid: Use zones for main distribution, traces for branches
Guide created: 2025-12-28