The existing y_flip tests cover Device:R (symmetric two-pin) and Device:C
rotated 90° (still electrically symmetric). The original bug — a double
Y-flip in get_pin_location — was invisible on symmetric passives because
pin 1 and pin 2 are interchangeable; it only showed up on asymmetric
multi-pin ICs like RF_Module:ESP32-WROOM-32, where labels meant for pin 3
(EN) silently landed on pin 35 (TXD0).
This adds a third test using an inline 6-pin asymmetric symbol with pins
at both positive and negative library Y on both sides. It asserts every
pin lands at the formula-predicted (symbol_x + lib_px, symbol_y - lib_py)
position, with an explicit cross-check that lib +Y pins resolve *above*
the placement centre in schematic Y-down space.
No system-library dependency — the symbol is constructed inline so the
test runs anywhere pytest does.
Fixes#135
The symbol-to-schematic y-flip was applied twice in sequence (two identical
negation blocks with matching comments), cancelling out and leaving pin
Y-coordinates mirrored about the placement Y. For symmetric passives the
bug is invisible (pin 1 and pin 2 are electrically interchangeable); for
ICs with non-equivalent pins (power pins, opamp inputs, etc.) this causes
tools that go through PinLocator — connect_to_net, add_schematic_connection,
add_schematic_net_label with componentRef+pinNumber — to place connections
at the mirror-flipped pin. Verified against kicad-cli generate_netlist
ground truth: on a Device:R placed at (111.76, 83.82), pin 1 resolves to
y=80.01 (actual) vs y=87.63 (pre-fix).
This is a regression of PR #103, which originally fixed the y-negation;
the redundant second block was added subsequently.
Includes a regression test with both a straight Device:R and a rotated
Device:C to exercise the y-flip + rotation pipeline.
