Commit Graph

23 Commits

Author SHA1 Message Date
NiNjA-CodE
76e644e4ef feat(routing): add add_gnd_stitching_vias MCP tool with all-layer collision (#191)
Drop GND stitching vias across the board with collision checking
against every non-GND segment, via, and pad on every copper layer.
PTH vias penetrate the full stackup, so an F.Cu-only check (the most
common shortcut) silently creates shorts on inner / B.Cu copper —
this implementation explicitly walks all layers.

  grid          Regular grid across the board interior. Default
                spacing 5mm.

  around_refs   Densify around specified footprints (e.g. MCUs,
                switching regulators, RF parts). Configurable
                density via densifyRadius.

  in_zones      Restrict placements to candidates inside the filled
                polygons of GND copper zones, so each new via lands
                on copper that's already a GND equipotential.
                Recommended on boards where the GND zone is fragmented:
                these vias actually stitch real polygons rather than
                floating on silkscreen.

All three strategies use the same collision check + intra-call
clump-prevention, so passing `["grid", "around_refs", "in_zones"]`
is a safe kitchen-sink configuration.

  - Auto-detect GND net (tries GND / GROUND / VSS / /GND in order)
    OR explicit `gndNet` parameter.
  - Per-via geometry control: viaSize, viaDrill, clearance.
  - edgeMargin: keep-out distance from board edge.
  - maxVias: cap on total placements (useful for incremental work).
  - dryRun: return placements without modifying the board — for
    previewing before committing.
  - Validates viaDrill < viaSize, rejects unknown strategy names,
    surfaces clear errors when GND net can't be resolved or the
    board outline is missing.

Approach ported from morningfire-pcb-automation
(https://github.com/NiNjA-CodE/morningfire-pcb-automation,
scripts/ground/add_gnd_vias.py). The original parses the PCB text
with regex and writes vias by string concatenation; this port reads
obstacles via the pcbnew API (handles rotated footprints, integrates
with the live in-memory board so two sequential calls see each
other's placements, picks up net codes from the loaded board) and
adds the in_zones strategy, the maxVias cap, and dry-run mode.

Credit is in the docstring, the TypeScript wrapper comment, the MCP
tool description (visible to clients), and the CHANGELOG entry.

tests/test_add_gnd_stitching_vias.py — 18 cases, all passing.
Uses mocked pcbnew objects so the suite runs under both the conftest
stub and a real pcbnew install.

  - grid strategy fills empty board with correct count
  - collision blocks via near a signal track (with extent assertion)
  - GND-net obstacles are correctly ignored
  - around_refs densifies near footprints with bounded extent
  - in_zones rejects candidates outside HitTestFilledArea
  - dryRun does NOT call board.Add
  - actual run calls board.Add per placement
  - maxVias caps total placements
  - intra-call clump prevention (asserts pairwise distance)
  - viaDrill >= viaSize is rejected
  - unknown strategy name is rejected
  - missing GND net returns clear error payload
  - no board loaded returns clear error
  - named GND net (e.g. VSS) is honoured even when GND also exists
  - direct unit tests for _point_to_segment_distance_nm helper

Real-board smoke test on TuneForge_TF001 (4-layer, 44 footprints):
  - GND net auto-detected
  - grid spacing 4mm: 141 placements, 129 blocked by collision
  - grid + in_zones: 140 placed, 15 rejected by zone membership,
    115 blocked by collision

  python/commands/routing.py         (+impl, ~370 LOC)
  python/kicad_interface.py          (+handler registration)
  python/schemas/tool_schemas.py     (+MCP schema)
  src/tools/routing.ts               (+TypeScript surface, builds clean)
  tests/test_add_gnd_stitching_vias.py (+18 tests)
  CHANGELOG.md                       (+Unreleased -> New MCP Tools)
2026-05-19 21:17:25 -04:00
kevargaso
40d6d6bba1 Add query_zones tool for auditing copper pours (#174)
query_traces silently omits PCB_ZONE_T objects, so layer-usage audits
miss power planes and GND pours entirely. query_zones complements it by
iterating board.Zones() and returning each zone's net, layers, priority,
fill state, min thickness, bounding box, and filled area, with the same
net/layer/boundingBox filter surface as query_traces.
2026-05-18 14:40:18 -04:00
karu2003
5c6b55453e feat(mcp): add route_arc_trace for true PCB arc primitives (SWIG + IPC) (#165) 2026-05-18 14:40:09 -04:00
Matthew Runo
53d9b4b567 fix: net-class API compatibility for KiCad 10 and trackWidth alias (#144)
`create_netclass` previously called legacy NETCLASSES.Find/.Add APIs that
were removed in KiCad 10. NETCLASS getters like GetMicroViaDiameter that
also no longer exist crashed any subsequent edit. The schema accepted
`traceWidth` but the handler only read `trackWidth`, so requests using
the documented field silently produced no-op netclasses.

- Add a KiCad-version-defensive shim around netclass creation that
  prefers the new netclasses_map dict-style API and falls back to legacy.
- Introduce _safe_get/_safe_set helpers so missing getters/setters on
  KiCad 10 NETCLASS objects fail gracefully instead of raising.
- Accept both traceWidth and trackWidth in the request payload.

Net classes still need to be written into .kicad_pro directly because
KiCad 10 stores them in net_settings.classes and the MCP only writes
to .kicad_pcb; that's a separate fix.
2026-05-18 14:34:30 -04:00
Tobias Welz
b19d341daf feat(routing): support '*' wildcard in delete_trace net_name
Passing net_name='*' now deletes all tracks on the board (respecting
the include_vias flag). Useful for wiping a test layout before
re-routing without having to iterate every net by name.
2026-04-23 14:04:21 +02:00
Eugene Mikhantyev
bfc25639c2 chore: normalize all tracked files to LF line endings
Mechanical application of the `.gitattributes` rules from the prior commit.
All 50 files differ only in line endings — verified by
`git diff --cached --ignore-all-space` being empty.

Before: main had 42 CRLF + 27 LF Python files plus mixed-ending in YAML,
templates, and shell scripts. After: every text file is LF (except the
Windows-native *.ps1, *.bat scripts which remain CRLF per gitattributes).

This eliminates the noisy-diff failure mode seen in PR #102, where a
small logic change produced a 918-line diff due to whole-file CRLF→LF
conversion.
2026-04-18 15:23:00 +01:00
Eugene Mikhantyev
9b1024a8f3 chore: enable strict mypy checks and fix pre-commit mypy hook
Add type annotations to all previously untyped functions and remove 9
suppressed error codes (call-arg, assignment, return-value, operator,
has-type, dict-item, misc, list-item, annotation-unchecked) by fixing
the underlying type issues.

Add [[tool.mypy.overrides]] with ignore_missing_imports for KiCAD-specific
modules (pcbnew, sexpdata, skip, cairosvg, kipy, PIL) so the pre-commit
mypy hook passes in its isolated venv. Add types-requests and pytest to
additional_dependencies in .pre-commit-config.yaml.

Also fixes several real bugs uncovered by stricter checks: incorrect static
calls to instance methods in swig_backend, wrong return type on get_size,
missing value param in BoardAPI.place_component, variable shadowing in
kicad_process.py, unqualified LibraryManager reference in kicad_interface,
and missing top-level Path import.

Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
2026-04-05 23:50:54 +01:00
Eugene Mikhantyev
c44bd9205d style: sort Python imports with isort
Add isort configuration (profile=black, line_length=100) to pyproject.toml,
add isort pre-commit hook, and auto-sort imports across all Python source files.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
2026-03-29 13:02:24 +01:00
Eugene Mikhantyev
75cead0860 style: apply Black formatting to all Python files
Add [tool.black] config to pyproject.toml and Black hook to
.pre-commit-config.yaml (rev 26.3.1), then auto-format all Python
source and test files with line-length=100, target-version=py310.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
2026-03-29 13:01:08 +01:00
Tom
3d9497ebe5 fix: snapshot saves logs+prompt to logs/ subdir; routing via_x under start pad; router disabled 2026-03-11 11:20:05 +01:00
Tom
3e329cbf6b fix: route_pad_to_pad auto-inserts via when pads are on different copper layers
- Detects F.Cu<->B.Cu layer mismatch in route_pad_to_pad
- Splits route into: trace on start layer + via at midpoint + trace on end layer
- route_trace description warns: use route_pad_to_pad for cross-layer routing
- route_pad_to_pad description highlights automatic via insertion
2026-03-07 15:46:54 +01:00
Tom
8e4e3176c2 fix: register sync_schematic_to_board + snapshot_project as MCP tools; auto-save board after SWIG mutations; boardPath reload in place_component; add_schematic_connection warns about connect_passthrough; via.GetWidth(F_Cu) for KiCAD 9.0 2026-03-07 11:27:41 +01:00
Tom
0f1bfa3eff fix: search_tools now includes direct tools (snapshot_project etc.)
- searchTools() previously only searched routed tool categories, so
  direct tools like snapshot_project, save_project, create_project
  returned 0 results when Claude called search_tools('snapshot')
- Direct tools are now searched first, with a hint that they must be
  called directly (not via execute_tool)

Also includes routing.py zone-inset fix for rounded board corners
(already staged from previous session)
2026-03-07 09:56:08 +01:00
Roman PASSLER
2dd9de6a52 style: apply black formatting to changed files 2026-03-01 19:15:32 +01:00
Roman PASSLER
ec1939bef4 fix(copper-pour): add outline parameter and fallback to board outline
Two issues fixed:
1. TypeScript schema was missing the outline parameter entirely,
   so MCP clients couldn't send pour boundary points.
2. Python code read "points" key but schema defined "outline" key.

Now accepts "outline" (with "points" as fallback for backwards
compatibility). When no outline is provided, automatically uses
the board edge bounding box as the pour boundary.
2026-03-01 18:40:24 +01:00
Roman PASSLER
246050001a fix(nets): use GetNetClassName() instead of GetClassName() on NETINFO_ITEM
NETINFO_ITEM objects don't have a GetClassName() method, causing
an AttributeError crash when listing nets. The correct method is
GetNetClassName() which returns the net class name string.
2026-03-01 18:37:55 +01:00
Tom
f0d738fff1 feat: add route_pad_to_pad tool
Convenience wrapper around route_trace that eliminates the need for
separate get_pad_position calls before routing.

- Accepts fromRef/fromPad/toRef/toPad instead of raw coordinates
- Automatically looks up pad positions from board footprints
- Auto-detects net from pad assignment (overridable via net param)
- Returns fromPad/toPad position info in response
- Saves ~2 tool calls (64+ calls for a full TMC2209 board) vs 3-step flow

Registered in: routing.py, kicad_interface.py (dispatch), routing.ts (MCP)
2026-03-01 15:03:52 +01:00
Tom
b33d6e22fd fix: project-local library resolution + copy_routing_pattern geometric fallback + TypeScript tool
- fix: DynamicSymbolLoader reads project sym-lib-table before global dirs
  add_schematic_component now finds symbols from project-local .kicad_sym files
  project_path derived automatically from schematic file path

- fix: place_component reloads FootprintLibraryManager with project_path
  new boardPath parameter passed to place_component tool (TypeScript + Python)
  _handle_place_component wrapper recreates LibraryManager per project

- fix: copy_routing_pattern geometric fallback when pads have no nets
  primary filter: net-based (when pads are assigned to nets)
  fallback: bounding box of source footprint pads +5mm tolerance
  filterMethod field in response indicates which mode was used

- feat: register copy_routing_pattern as MCP tool in routing.ts
  sourceRefs, targetRefs, includeVias, traceWidth parameters

Live tested: ESP32 + 2x TMC2209 in Test3 project
  13 traces U2 routed, copy_routing_pattern copied all 13 to U3
  offset Y+30mm correct, 26 total traces verified
2026-03-01 15:03:52 +01:00
Tom
2945b52eae feat: Add missing routing/component tools and fix SWIG/UUID bugs
New MCP tools added (TypeScript layer):
- Routing: delete_trace, query_traces, get_nets_list, modify_trace,
  create_netclass, route_differential_pair, refill_zones (with SWIG warning)
- Component: get_component_pads, get_component_list, get_pad_position,
  place_component_array, align_components, duplicate_component

Bug fixes:
- routing.py: Fix SwigPyObject UUID comparison (str() -> m_Uuid.AsString())
- routing.py: Fix SWIG iterator invalidation after board.Remove()
  by converting board.Tracks() to list() before iteration
- routing.py: Add board.SetModified() and clear Python refs after Remove()
  to prevent dangling SWIG pointers crashing subsequent calls
- routing.py: Wrap each track access in try/except in query_traces()
  to gracefully skip invalid track objects after bulk delete
- routing.py: Add missing return statement (mypy fix)
- library.py: Fix search_footprints param mapping search_term->pattern
- library.py: Fix fp.name -> fp.full_name field access
- library.py: Accept both 'pattern' and 'search_term' parameter names
- library.py: Add library filter support in search_footprints
- library.py: Fix loop variable shadowing Path object (mypy fix)
- design_rules.py: Add type annotation for violation_counts (mypy fix)

Contribution guidelines followed (CONTRIBUTING.md):
- black python/ applied (3 touched files pass without changes)
- mypy python/ passes with 0 errors on all changed files
- npx prettier --write applied to changed TypeScript files
- npm run build passes (tsc --noEmit: 0 errors)
- Commit messages follow feat:/fix: convention

Note on diff size: The large insertion/deletion count in the changed files
is due to black and prettier reformatting previously unformatted code
(missing trailing commas, quote style, line length). The actual logic
changes are limited to the 6 files listed above.

Note: refill_zones has known SWIG segfault risk (see KNOWN_ISSUES.md).
Prefer IPC backend (KiCAD open) or zone fill via KiCAD UI.
2026-02-27 18:15:46 +01:00
KiCAD MCP Bot
b9bd401b11 feat: Add routing replication commands for Issue #30 Phase 2
Implements advanced trace manipulation and routing pattern copying:
- Enhanced delete_trace with net-based bulk deletion and layer filtering
- Added modify_trace to change width, layer, or net by UUID/position
- Added copy_routing_pattern to replicate routing between component groups

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-19 19:24:59 -05:00
KiCAD MCP Bot
04db774a2b feat: Address multiple open issues (#32, #30, #26, #19)
Issue #32 - Unknown command errors:
- Register get_board_extents in command_routes (was implemented but not registered)
- Implement find_component command with pattern matching on reference/value/footprint
- Add schemas for both commands

Issue #30 - PCB routing replication (Phase 1):
- Implement get_component_pads: returns all pads with positions, nets, shapes
- Implement get_pad_position: returns specific pad coordinates and properties
- Implement query_traces: query traces by net, layer, or bounding box
- Add schemas for all new commands

Issue #26 - Schematic workflow:
- Add missing schemas for add_schematic_connection, add_schematic_net_label,
  connect_to_net, get_net_connections, and generate_netlist

Issue #19 - macOS Python path detection:
- Add Python 3.13 to version detection
- Add alternative KiCAD installation paths (user Applications, capitalization variants)
- Add Homebrew Python fallback paths for Apple Silicon and Intel Macs
- Expand platform_helper.py with same improvements

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-19 19:17:35 -05:00
KiCAD MCP Bot
5717a91a59 Add comprehensive Windows support and documentation
Windows Support Package:
- PowerShell automated setup script (setup-windows.ps1)
  - Auto-detects KiCAD installation and version
  - Validates all prerequisites (Node.js, Python, pcbnew)
  - Installs dependencies automatically
  - Generates MCP configuration with platform-specific paths
  - Runs comprehensive diagnostic tests
- Windows troubleshooting guide (docs/WINDOWS_TROUBLESHOOTING.md)
- Platform comparison guide (docs/PLATFORM_GUIDE.md)

Code Enhancements:
- Enhanced Windows error diagnostics in Python interface
- Startup validation in TypeScript server
- Platform-specific error messages with troubleshooting hints
- Component library integration (153 KiCAD footprint libraries)
- Routing operations KiCAD 9.0 API compatibility fixes

Documentation Updates:
- Updated README with Windows automated setup
- Real-time collaboration workflow guide
- Library integration documentation
- JLCPCB integration planning
- Updated status to reflect Windows support
- Changelogs for Nov 1 and Nov 5 updates

Infrastructure:
- Added venv/ to .gitignore to prevent virtual env commits

Generated with [Claude Code](https://claude.com/claude-code)

Co-Authored-By: Claude <noreply@anthropic.com>
2025-11-05 09:10:45 -05:00
KiCAD MCP Bot
e4c7119c51 feat: Week 1 complete - Linux support + IPC API prep
🎉 Major v2.0 rebuild kickoff - Week 1 accomplished!

## Highlights

### Cross-Platform Support 🌍
-  Linux primary platform (Ubuntu/Debian tested)
-  Windows fully supported
-  macOS experimental support
-  Platform-agnostic path handling (XDG spec)
-  Auto-detection of KiCAD installation

### Infrastructure 🏗️
-  GitHub Actions CI/CD pipeline
-  Pytest framework with 20+ tests
-  Pre-commit hooks (Black, MyPy, ESLint)
-  Automated Linux installation script
-  Enhanced npm scripts

### IPC API Migration Prep 🚀
-  Comprehensive migration plan (30 pages)
-  Backend abstraction layer (800+ lines)
-  Factory pattern with auto-detection
-  SWIG backward compatibility wrapper
-  IPC backend skeleton ready

### Documentation 📚
-  Updated README (Linux installation)
-  CONTRIBUTING.md guide
-  Linux compatibility audit
-  IPC API migration plan
-  Session summaries
-  Platform-specific config templates

## Files Changed

- 27 files created
- ~3,000 lines of code/docs
- 8 comprehensive documentation pages
- 20+ unit tests
- 5 abstraction layer modules

## Next Steps

- Week 2: IPC API migration (project.py → component.py → routing.py)
- Migrate from deprecated SWIG to official IPC API
- JLCPCB/Digikey integration prep

🤖 Generated with Claude Code
https://claude.com/claude-code

Co-Authored-By: Claude <noreply@anthropic.com>
2025-10-25 20:48:00 -04:00