From a22796b70b01c6d24acbc1c72a1a7aa67a51d8fe Mon Sep 17 00:00:00 2001 From: nearxos Date: Mon, 22 Jun 2026 12:58:06 +0300 Subject: [PATCH] =?UTF-8?q?ESP32-S3=20Sensor=20Node=20L2.1=20=E2=80=94=20s?= =?UTF-8?q?chematic=20ERC=200,=20PCB=20outline+placement,=20README?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .gitignore | 10 + README.md | 80 +++ esp32-s3-sensor-node.kicad_pcb | 276 +++++++++++ esp32-s3-sensor-node.kicad_prl | 105 ++++ esp32-s3-sensor-node.kicad_pro | 323 +++++++++++++ esp32-s3-sensor-node.kicad_sch | 856 +++++++++++++++++++++++++++++++++ finalize.py | 172 +++++++ gen_pcb.py | 147 ++++++ placement.csv | 21 + 9 files changed, 1990 insertions(+) create mode 100644 .gitignore create mode 100644 README.md create mode 100644 esp32-s3-sensor-node.kicad_pcb create mode 100644 esp32-s3-sensor-node.kicad_prl create mode 100644 esp32-s3-sensor-node.kicad_pro create mode 100644 esp32-s3-sensor-node.kicad_sch create mode 100644 finalize.py create mode 100644 gen_pcb.py create mode 100644 placement.csv diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..dae2a9f --- /dev/null +++ b/.gitignore @@ -0,0 +1,10 @@ +*.bak +*.mcpbak +.history/ +.mcp-backups/ +analysis/ +*.dsn +*.ses +*-erc.rpt +*-drc.rpt +drc_violations* diff --git a/README.md b/README.md new file mode 100644 index 0000000..c66a334 --- /dev/null +++ b/README.md @@ -0,0 +1,80 @@ +# ESP32-S3 Sensor Node — L2.1 Training Exercise + +## Project Setup + +1. **Open in KiCad 10.0+** — File → Open Project → `/Users/nearxos/Documents/KiCad/10.0/esp32-s3-sensor-node` +2. **Schematic** — Already clean (ERC 0). View in Eeschema. +3. **PCB Layout** — Needs routing. Create board in Pcbnew. + +## PCB Spec +- **Size:** 65 × 40mm, 2-layer +- **Stackup:** 1.6mm FR4, 1oz copper, HASL +- **Design rules:** trace/space 0.15mm, drill 0.3mm, annular 0.15mm +- **Target fab:** JLCPCB / PCBWay standard + +## Component Placement + +``` +Board: (0,0) bottom-left, (65,40) top-right + +Left edge (x≈5-15): + J1 USB-C @ (7, 20) — left edge, USB mating face outward + R7 CC1 pull-down @ (11, 28) + R8 CC2 pull-down @ (11, 25) + +Lower-left (x≈15-25, y≈3-15): + J3 PROG header @ (25, 3) — bottom edge + R3 IO0 pull-up @ (16, 7) + R4 IO12 pull-down @ (16, 12) + +Center-left (x≈20-30): + U2 AMS1117-3.3 @ (20, 20) — regulator + C5 10µF input @ (24, 17) — near U2 pin 3 (VI) + C6 10µF output @ (24, 23) — near U2 pin 2 (VO) + +Center (x≈27-38): + R2 EN pull-up @ (27, 32) + C4 EN cap @ (26, 35) + C1-C3 decoupling @ (30, 22-28) — near U1 3V3 pins + U1 ESP32-S3 @ (38, 20) — main module + +Right side (x≈48-58): + R5 SDA pull-up @ (48, 24) + R6 SCL pull-up @ (48, 22) + J2 I2C connector @ (56, 20) — right edge + D1 Status LED @ (55, 34) — top-right edge + R1 LED resistor @ (55, 30) +``` + +## Antenna Keepout +- **Zone:** x > 46mm, y > 28mm (top-right corner) +- No copper, no traces, no components in this area +- The ESP32-S3-WROOM-1 module has its PCB antenna at the top-right corner + +## Routing Order +1. **USB differential pair** — USB_D_P / USB_D_N: 90Ω impedance, length-matched + - Width: ~0.3mm on 1.6mm FR4 (calc with fab's tool) + - Gap: ~0.15mm + - Route on top layer, GND reference on bottom +2. **3V3 power** — 0.5mm traces from U2 VO to U1 3V3 pin + all 3V3 nodes +3. **VBUS power** — 0.5mm from J1 to U2 VI +4. **GND** — Copper pours on both layers with stitching vias +5. **I2C** — SDA/SCL routed together, away from noisy traces +6. **UART** — RXD0/TXD0 to J3 +7. **Strapping** — EN, IO0, IO12 to pull resistors +8. **LED** — IO2_LED through R1 to D1 + +## GND Pour Strategy +- **B.Cu (bottom):** Full copper pour, entire board area +- **F.Cu (top):** Full copper pour EXCEPT antenna keepout zone +- **Antenna keepout:** Keepout zone polygon on both layers (no copper) +- **Stitching vias:** Perimeter every 5mm, plus around module GND pads + +## Files +| File | Description | +|------|-------------| +| `*.kicad_sch` | Schematic (ERC 0) | +| `*.kicad_pcb` | PCB layout (empty, needs routing) | +| `*.kicad_pro` | Project file | +| `gen_schematic.py` | Python schematic generator | +| `gen_pcb.py` | Python PCB generator (outline + placement) | diff --git a/esp32-s3-sensor-node.kicad_pcb b/esp32-s3-sensor-node.kicad_pcb new file mode 100644 index 0000000..0f0945a --- /dev/null +++ b/esp32-s3-sensor-node.kicad_pcb @@ -0,0 +1,276 @@ +(kicad_pcb + (version 20260206) + (generator "pcbnew") + (generator_version "10.0") + (general + (thickness 1.6) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (2 "B.Cu" signal) + (13 "F.Paste" user) + (15 "B.Paste" user) + (5 "F.SilkS" user) + (7 "B.SilkS" user) + (1 "F.Mask" user) + (3 "B.Mask" user) + (25 "Edge.Cuts" user) + (31 "F.CrtYd" user) + (29 "B.CrtYd" user) + (35 "F.Fab" user) + (33 "B.Fab" user) + ) + (setup + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (copper_edge_clearance 0.3) + ) + (nets + (net 0 "GND") + (net 1 "3V3") + (net 2 "VBUS") + (net 3 "EN") + (net 4 "IO0") + (net 5 "IO12") + (net 6 "SDA") + (net 7 "SCL") + (net 8 "USB_D_P") + (net 9 "USB_D_N") + (net 10 "CC1") + (net 11 "CC2") + (net 12 "IO2_LED") + (net 13 "D1_A") + (net 14 "RXD0") + (net 15 "TXD0") + ) + (net_class "Default" (clearance 0.15) (trace_width 0.2) (via_dia 0.6) (via_drill 0.3) (add_net "*")) + (net_class "POWER" (clearance 0.25) (trace_width 0.5) (via_dia 0.8) (via_drill 0.4) (add_net "3V3") (add_net "VBUS")) + (polygon (layer "Edge.Cuts") + (pts + (xy 0 0) + (xy 65.0 0) + (xy 65.0 40.0) + (xy 0 40.0) + ) + ) + (footprint ""Connector_USB:USB_C_Receptacle_USB2.0_16P"" + (layer "F.Cu") + (at 7.000 20.000 0) + (descr "J1") + (property "Reference" "J1" (at 7.000 17.000) (layer "F.SilkS") (effects (font (size 1 1) (thickness 0.15)))) + (property "Value" "J1" (at 7.000 23.000) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15)))) + (pad "SH" smd rect (at -3.000 0.000 0) (size 2.000 2.000) (layers "F.Cu" "F.Paste" "F.Mask") (net 0)) + (pad "A1" smd rect (at -2.000 5.000 0) (size 1.500 1.500) (layers "F.Cu" "F.Paste" "F.Mask") (net 0)) + (pad "A4" smd rect (at -2.000 -5.000 0) (size 1.500 1.500) (layers "F.Cu" "F.Paste" "F.Mask") (net 2)) + (pad "A5" smd rect (at -2.000 -3.000 0) (size 1.500 0.800) (layers "F.Cu" "F.Paste" "F.Mask") (net 10)) + (pad "A6" smd rect (at -2.000 -1.000 0) (size 1.500 0.800) (layers "F.Cu" "F.Paste" "F.Mask") (net 8)) + (pad "A7" smd rect (at -2.000 1.000 0) (size 1.500 0.800) (layers "F.Cu" "F.Paste" "F.Mask") (net 9)) + (pad "B5" smd rect (at -2.000 3.000 0) (size 1.500 0.800) (layers "F.Cu" "F.Paste" "F.Mask") (net 11)) + (pad "B6" smd rect (at -2.000 0.000 0) (size 1.500 0.800) (layers "F.Cu" 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(property "Value" "U1" (at 38.000 23.000) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15)))) + (pad "1" smd rect (at -8.000 8.000 0) (size 1.500 1.500) (layers "F.Cu" "F.Paste" "F.Mask") (net 0)) + (pad "2" smd rect (at -8.000 -8.000 0) (size 1.500 1.500) (layers "F.Cu" "F.Paste" "F.Mask") (net 1)) + (pad "3" smd rect (at -8.000 -6.000 0) (size 1.000 1.000) (layers "F.Cu" "F.Paste" "F.Mask") (net 3)) + (pad "4" smd rect (at -8.000 -4.000 0) (size 1.000 1.000) (layers "F.Cu" "F.Paste" "F.Mask") (net 6)) + (pad "5" smd rect (at -8.000 -2.000 0) (size 1.000 1.000) (layers "F.Cu" "F.Paste" "F.Mask") (net 7)) + (pad "13" smd rect (at 8.000 -4.000 0) (size 1.000 1.000) (layers "F.Cu" "F.Paste" "F.Mask") (net 9)) + (pad "14" smd rect (at 8.000 -2.000 0) (size 1.000 1.000) (layers "F.Cu" "F.Paste" "F.Mask") (net 8)) + (pad "20" smd rect (at -8.000 4.000 0) (size 1.000 1.000) (layers "F.Cu" "F.Paste" "F.Mask") (net 5)) + (pad "27" smd rect (at -8.000 0.000 0) (size 1.000 1.000) (layers "F.Cu" "F.Paste" "F.Mask") (net 4)) + (pad "36" smd rect (at 8.000 -8.000 0) (size 1.000 1.000) (layers "F.Cu" "F.Paste" "F.Mask") (net 14)) + (pad "37" smd rect (at 8.000 -6.000 0) (size 1.000 1.000) (layers "F.Cu" "F.Paste" "F.Mask") (net 15)) + (pad "38" smd rect (at -8.000 2.000 0) (size 1.000 1.000) (layers "F.Cu" "F.Paste" "F.Mask") (net 12)) + ) + (footprint ""Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical"" + (layer "F.Cu") + (at 56.000 20.000 0) + (descr "J2") + (property "Reference" "J2" (at 56.000 17.000) (layer "F.SilkS") (effects (font (size 1 1) (thickness 0.15)))) + (property "Value" "J2" (at 56.000 23.000) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15)))) + (pad "1" smd rect (at 0.000 3.810 0) (size 1.500 1.500) (layers "F.Cu" "F.Paste" "F.Mask") (net 1)) + (pad "2" smd rect (at 0.000 1.270 0) (size 1.500 1.500) (layers "F.Cu" "F.Paste" "F.Mask") (net 6)) + (pad "3" smd rect (at 0.000 -1.270 0) (size 1.500 1.500) (layers "F.Cu" "F.Paste" "F.Mask") (net 7)) + (pad "4" smd rect (at 0.000 -3.810 0) (size 1.500 1.500) (layers "F.Cu" "F.Paste" "F.Mask") (net 0)) + ) + (footprint ""Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical"" + (layer "F.Cu") + (at 25.000 3.000 0) + (descr "J3") + (property "Reference" "J3" (at 25.000 0.000) (layer "F.SilkS") (effects (font (size 1 1) (thickness 0.15)))) + (property "Value" "J3" (at 25.000 6.000) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15)))) + (pad "1" smd rect (at 0.000 -3.810 0) (size 1.500 1.500) (layers "F.Cu" "F.Paste" "F.Mask") (net 0)) + (pad "2" smd rect (at 0.000 -1.270 0) (size 1.500 1.500) (layers "F.Cu" "F.Paste" "F.Mask") (net 14)) + (pad "3" smd rect (at 0.000 1.270 0) (size 1.500 1.500) (layers "F.Cu" "F.Paste" "F.Mask") (net 15)) + (pad "4" smd rect (at 0.000 3.810 0) (size 1.500 1.500) (layers "F.Cu" "F.Paste" "F.Mask") (net 1)) + ) + (footprint ""LED_SMD:LED_0603_1608Metric"" + (layer "F.Cu") + (at 55.000 34.000 0) + (descr "D1") + (property "Reference" "D1" (at 55.000 31.000) (layer "F.SilkS") (effects (font (size 1 1) (thickness 0.15)))) + (property "Value" "D1" (at 55.000 37.000) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15)))) + (pad "1" smd rect (at -0.800 0.000 0) (size 0.800 0.800) (layers "F.Cu" "F.Paste" "F.Mask") (net 0)) + (pad "2" smd rect (at 0.800 0.000 0) (size 0.800 0.800) (layers "F.Cu" "F.Paste" "F.Mask") (net 13)) + ) + (footprint ""Resistor_SMD:R_0603_1608Metric"" + (layer "F.Cu") + (at 55.000 30.000 0) + (descr "R1") + (property "Reference" "R1" (at 55.000 27.000) (layer "F.SilkS") (effects (font (size 1 1) (thickness 0.15)))) + (property "Value" "R1" (at 55.000 33.000) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15)))) + (pad "1" smd rect (at -0.800 0.900 0) (size 0.800 0.800) (layers "F.Cu" "F.Paste" "F.Mask") (net 12)) + (pad "2" smd rect (at -0.800 -0.900 0) (size 0.800 0.800) (layers "F.Cu" "F.Paste" "F.Mask") (net 13)) + ) + (footprint ""Resistor_SMD:R_0603_1608Metric"" + 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(net 1)) + ) + (footprint ""Resistor_SMD:R_0603_1608Metric"" + (layer "F.Cu") + (at 16.000 12.000 0) + (descr "R4") + (property "Reference" "R4" (at 16.000 9.000) (layer "F.SilkS") (effects (font (size 1 1) (thickness 0.15)))) + (property "Value" "R4" (at 16.000 15.000) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15)))) + (pad "1" smd rect (at -0.800 0.900 0) (size 0.800 0.800) (layers "F.Cu" "F.Paste" "F.Mask") (net 5)) + (pad "2" smd rect (at -0.800 -0.900 0) (size 0.800 0.800) (layers "F.Cu" "F.Paste" "F.Mask") (net 0)) + ) + (footprint ""Resistor_SMD:R_0603_1608Metric"" + (layer "F.Cu") + (at 48.000 24.000 0) + (descr "R5") + (property "Reference" "R5" (at 48.000 21.000) (layer "F.SilkS") (effects (font (size 1 1) (thickness 0.15)))) + (property "Value" "R5" (at 48.000 27.000) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15)))) + (pad "1" smd rect (at -0.800 0.900 0) (size 0.800 0.800) (layers "F.Cu" "F.Paste" "F.Mask") (net 6)) + (pad "2" smd rect (at -0.800 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0) (type default)) + (uuid "wr-0046") +) +(label "IO0" (at 165.10 196.85) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0046") +) +(wire (pts (xy 165.10 207.01) (xy 165.10 209.55)) + (stroke (width 0) (type default)) + (uuid "wr-0047") +) +(label "3V3" (at 165.10 209.55) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0047") +) +(wire (pts (xy 171.45 118.11) (xy 171.45 115.57)) + (stroke (width 0) (type default)) + (uuid "wr-0048") +) +(label "IO12" (at 171.45 115.57) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0048") +) +(wire (pts (xy 171.45 125.73) (xy 171.45 128.27)) + (stroke (width 0) (type default)) + (uuid "wr-0049") +) +(label "GND" (at 171.45 128.27) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0049") +) +(wire (pts (xy 152.40 34.29) (xy 152.40 31.75)) + (stroke (width 0) (type default)) + (uuid "wr-0050") +) +(label "SDA" (at 152.40 31.75) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0050") +) +(wire (pts (xy 152.40 41.91) (xy 152.40 44.45)) + (stroke (width 0) (type default)) + (uuid "wr-0051") +) +(label "3V3" (at 152.40 44.45) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0051") +) +(wire (pts (xy 152.40 52.07) (xy 152.40 49.53)) + (stroke (width 0) (type default)) + (uuid "wr-0052") +) +(label "SCL" (at 152.40 49.53) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0052") +) +(wire (pts (xy 152.40 59.69) (xy 152.40 62.23)) + (stroke (width 0) (type default)) + (uuid "wr-0053") +) +(label "3V3" (at 152.40 62.23) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0053") +) +(wire (pts (xy 33.02 138.43) (xy 33.02 135.89)) + (stroke (width 0) (type default)) + (uuid "wr-0054") +) +(label "CC1" (at 33.02 135.89) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0054") +) +(wire (pts (xy 33.02 146.05) (xy 33.02 148.59)) + (stroke (width 0) (type default)) + (uuid "wr-0055") +) +(label "GND" (at 33.02 148.59) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0055") +) +(wire (pts (xy 33.02 153.67) (xy 33.02 151.13)) + (stroke (width 0) (type default)) + (uuid "wr-0056") +) +(label "CC2" (at 33.02 151.13) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0056") +) +(wire (pts (xy 33.02 161.29) (xy 33.02 163.83)) + (stroke (width 0) (type default)) + (uuid "wr-0057") +) +(label "GND" (at 33.02 163.83) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0057") +) +(wire (pts (xy 63.50 128.27) (xy 63.50 125.73)) + (stroke (width 0) (type default)) + (uuid "wr-0058") +) +(label "3V3" (at 63.50 125.73) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0058") +) +(wire (pts (xy 63.50 135.89) (xy 63.50 138.43)) + (stroke (width 0) (type default)) + (uuid "wr-0059") +) +(label "GND" (at 63.50 138.43) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0059") +) +(wire (pts (xy 63.50 143.51) (xy 63.50 140.97)) + (stroke (width 0) (type default)) + (uuid "wr-0060") +) +(label "3V3" (at 63.50 140.97) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0060") +) +(wire (pts (xy 63.50 151.13) (xy 63.50 153.67)) + (stroke (width 0) (type default)) + (uuid "wr-0061") +) +(label "GND" (at 63.50 153.67) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0061") +) +(wire (pts (xy 63.50 158.75) (xy 63.50 156.21)) + (stroke (width 0) (type default)) + (uuid "wr-0062") +) +(label "3V3" (at 63.50 156.21) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0062") +) +(wire (pts (xy 63.50 166.37) (xy 63.50 168.91)) + (stroke (width 0) (type default)) + (uuid "wr-0063") +) +(label "GND" (at 63.50 168.91) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0063") +) +(wire (pts (xy 55.88 179.07) (xy 55.88 176.53)) + (stroke (width 0) (type default)) + (uuid "wr-0064") +) +(label "EN" (at 55.88 176.53) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0064") +) +(wire (pts (xy 55.88 186.69) (xy 55.88 189.23)) + (stroke (width 0) (type default)) + (uuid "wr-0065") +) +(label "GND" (at 55.88 189.23) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0065") +) +(wire (pts (xy 50.80 80.01) (xy 50.80 77.47)) + (stroke (width 0) (type default)) + (uuid "wr-0066") +) +(label "VBUS" (at 50.80 77.47) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0066") +) +(wire (pts (xy 50.80 87.63) (xy 50.80 90.17)) + (stroke (width 0) (type default)) + (uuid "wr-0067") +) +(label "GND" (at 50.80 90.17) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0067") +) +(wire (pts (xy 50.80 115.57) (xy 50.80 113.03)) + (stroke (width 0) (type default)) + (uuid "wr-0068") +) +(label "3V3" (at 50.80 113.03) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0068") +) +(wire (pts (xy 50.80 123.19) (xy 50.80 125.73)) + (stroke (width 0) (type default)) + (uuid "wr-0069") +) +(label "GND" (at 50.80 125.73) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0069") +) +(wire (pts (xy 55.88 50.80) (xy 58.42 50.80)) + (stroke (width 0) (type default)) + (uuid "wr-0070") +) +(label "3V3" (at 58.42 50.80) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0070") +) +(wire (pts (xy 55.88 220.98) (xy 58.42 220.98)) + (stroke (width 0) (type default)) + (uuid "wr-0071") +) +(label "GND" (at 58.42 220.98) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0071") +) +(wire (pts (xy 93.98 215.90) (xy 96.52 215.90)) + (stroke (width 0) (type default)) + (uuid "wr-0072") +) +(label "GND" (at 96.52 215.90) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0072") +) +(wire (pts (xy 101.60 215.90) (xy 104.14 215.90)) + (stroke (width 0) (type default)) + (uuid "wr-0073") +) +(label "GND" (at 104.14 215.90) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0073") +) +(wire (pts (xy 101.60 226.06) (xy 104.14 226.06)) + (stroke (width 0) (type default)) + (uuid "wr-0074") +) +(label "VBUS" (at 104.14 226.06) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0074") +) +(wire (pts (xy 101.60 236.22) (xy 104.14 236.22)) + (stroke (width 0) (type default)) + (uuid "wr-0075") +) +(label "3V3" (at 104.14 236.22) + (effects (font (size 1.27 1.27)) (justify left bottom)) + (uuid "lb-0075") +) +) \ No newline at end of file diff --git a/finalize.py b/finalize.py new file mode 100644 index 0000000..971dec2 --- /dev/null +++ b/finalize.py @@ -0,0 +1,172 @@ +#!/usr/bin/env python3 +""" +Generate a complete importable KiCad project for ESP32-S3 Sensor Node. +Creates netlist, component placement guide, and README. +""" +import os, json + +PROJ_DIR = os.path.expanduser("~/Documents/KiCad/10.0/esp32-s3-sensor-node") +SCH = os.path.join(PROJ_DIR, "esp32-s3-sensor-node.kicad_sch") +PRO = os.path.join(PROJ_DIR, "esp32-s3-sensor-node.kicad_pro") + +NETS = ["GND","3V3","VBUS","EN","IO0","IO12", + "SDA","SCL","USB_D_P","USB_D_N", + "CC1","CC2","IO2_LED","D1_A","RXD0","TXD0"] + +PASSIVES = [ + ("R1", "Resistor_SMD:R_0603_1608Metric", 55, 30, 0, "IO2_LED", "D1_A", "470"), + ("R2", "Resistor_SMD:R_0603_1608Metric", 27, 32, 0, "EN", "3V3", "10k"), + ("R3", "Resistor_SMD:R_0603_1608Metric", 16, 7, 0, "IO0", "3V3", "10k"), + ("R4", "Resistor_SMD:R_0603_1608Metric", 16, 12, 0, "IO12", "GND", "10k"), + ("R5", "Resistor_SMD:R_0603_1608Metric", 48, 24, 0, "SDA", "3V3", "4.7k"), + ("R6", "Resistor_SMD:R_0603_1608Metric", 48, 22, 0, "SCL", "3V3", "4.7k"), + ("R7", "Resistor_SMD:R_0603_1608Metric", 11, 28, 0, "CC1", "GND", "5.1k"), + ("R8", "Resistor_SMD:R_0603_1608Metric", 11, 25, 0, "CC2", "GND", "5.1k"), + ("C1", "Capacitor_SMD:C_0603_1608Metric", 30, 28, 0, "3V3", "GND", "100nF"), + ("C2", "Capacitor_SMD:C_0603_1608Metric", 30, 25, 0, "3V3", "GND", "100nF"), + ("C3", "Capacitor_SMD:C_0603_1608Metric", 30, 22, 0, "3V3", "GND", "10uF"), + ("C4", "Capacitor_SMD:C_0603_1608Metric", 26, 35, 0, "EN", "GND", "100nF"), + ("C5", "Capacitor_SMD:C_0805_2012Metric", 24, 17, 0, "VBUS", "GND", "10uF"), + ("C6", "Capacitor_SMD:C_0805_2012Metric", 24, 23, 0, "3V3", "GND", "10uF"), +] + +ICS = [ + ("J1", "Connector_USB:USB_C_Receptacle_USB2.0_16P", + 7, 20, 0, "USB-C", [("SH","GND"),("A1","GND"),("A4","VBUS"), + ("A5","CC1"),("A6","USB_D_P"),("A7","USB_D_N"),("B5","CC2")]), + ("U2", "Package_TO_SOT_SMD:SOT-223-3Lead_TabPin2", + 20, 20, 0, "AMS1117-3.3", [("1","GND"),("2","3V3"),("3","VBUS")]), + ("U1", "RF_Module:ESP32-S3-WROOM-1", + 38, 20, 0, "ESP32-S3-WROOM-1", [("1","GND"),("2","3V3"),("3","EN"), + ("4","SDA"),("5","SCL"),("13","USB_D_N"),("14","USB_D_P"), + ("20","IO12"),("27","IO0"),("36","RXD0"),("37","TXD0"),("38","IO2_LED")]), + ("J2", "Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical", + 56, 20, 0, "I2C_Sensor", [("1","3V3"),("2","SDA"),("3","SCL"),("4","GND")]), + ("J3", "Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical", + 25, 3, 0, "PROG", [("1","GND"),("2","RXD0"),("3","TXD0"),("4","3V3")]), + ("D1", "LED_SMD:LED_0603_1608Metric", + 55, 34, 0, "LED_Green", [("1","GND"),("2","D1_A")]), +] + +def create_readme(): + md = f"""# ESP32-S3 Sensor Node — L2.1 Training Exercise + +## Project Setup + +1. **Open in KiCad 10.0+** — File → Open Project → `{PROJ_DIR}` +2. **Schematic** — Already clean (ERC 0). View in Eeschema. +3. **PCB Layout** — Needs routing. Create board in Pcbnew. + +## PCB Spec +- **Size:** 65 × 40mm, 2-layer +- **Stackup:** 1.6mm FR4, 1oz copper, HASL +- **Design rules:** trace/space 0.15mm, drill 0.3mm, annular 0.15mm +- **Target fab:** JLCPCB / PCBWay standard + +## Component Placement + +``` +Board: (0,0) bottom-left, (65,40) top-right + +Left edge (x≈5-15): + J1 USB-C @ (7, 20) — left edge, USB mating face outward + R7 CC1 pull-down @ (11, 28) + R8 CC2 pull-down @ (11, 25) + +Lower-left (x≈15-25, y≈3-15): + J3 PROG header @ (25, 3) — bottom edge + R3 IO0 pull-up @ (16, 7) + R4 IO12 pull-down @ (16, 12) + +Center-left (x≈20-30): + U2 AMS1117-3.3 @ (20, 20) — regulator + C5 10µF input @ (24, 17) — near U2 pin 3 (VI) + C6 10µF output @ (24, 23) — near U2 pin 2 (VO) + +Center (x≈27-38): + R2 EN pull-up @ (27, 32) + C4 EN cap @ (26, 35) + C1-C3 decoupling @ (30, 22-28) — near U1 3V3 pins + U1 ESP32-S3 @ (38, 20) — main module + +Right side (x≈48-58): + R5 SDA pull-up @ (48, 24) + R6 SCL pull-up @ (48, 22) + J2 I2C connector @ (56, 20) — right edge + D1 Status LED @ (55, 34) — top-right edge + R1 LED resistor @ (55, 30) +``` + +## Antenna Keepout +- **Zone:** x > 46mm, y > 28mm (top-right corner) +- No copper, no traces, no components in this area +- The ESP32-S3-WROOM-1 module has its PCB antenna at the top-right corner + +## Routing Order +1. **USB differential pair** — USB_D_P / USB_D_N: 90Ω impedance, length-matched + - Width: ~0.3mm on 1.6mm FR4 (calc with fab's tool) + - Gap: ~0.15mm + - Route on top layer, GND reference on bottom +2. **3V3 power** — 0.5mm traces from U2 VO to U1 3V3 pin + all 3V3 nodes +3. **VBUS power** — 0.5mm from J1 to U2 VI +4. **GND** — Copper pours on both layers with stitching vias +5. **I2C** — SDA/SCL routed together, away from noisy traces +6. **UART** — RXD0/TXD0 to J3 +7. **Strapping** — EN, IO0, IO12 to pull resistors +8. **LED** — IO2_LED through R1 to D1 + +## GND Pour Strategy +- **B.Cu (bottom):** Full copper pour, entire board area +- **F.Cu (top):** Full copper pour EXCEPT antenna keepout zone +- **Antenna keepout:** Keepout zone polygon on both layers (no copper) +- **Stitching vias:** Perimeter every 5mm, plus around module GND pads + +## Files +| File | Description | +|------|-------------| +| `*.kicad_sch` | Schematic (ERC 0) | +| `*.kicad_pcb` | PCB layout (empty, needs routing) | +| `*.kicad_pro` | Project file | +| `gen_schematic.py` | Python schematic generator | +| `gen_pcb.py` | Python PCB generator (outline + placement) | +""" + path = os.path.join(PROJ_DIR, "README.md") + with open(path, 'w') as f: + f.write(md) + print(f"Written: {path}") + +def create_placement_csv(): + """Placement file for reference.""" + path = os.path.join(PROJ_DIR, "placement.csv") + with open(path, 'w') as f: + f.write("Ref,Footprint,X(mm),Y(mm),Rotation,Net1,Net2\n") + for ref, fp, x, y, rot, n1, n2, val in PASSIVES: + f.write(f"{ref},{fp},{x},{y},{rot},{n1},{n2}\n") + for ref, fp, x, y, rot, val, pins in ICS: + nets = ", ".join(f"{p[0]}={p[1]}" for p in pins) + f.write(f"{ref},{fp},{x},{y},{rot},{nets}\n") + print(f"Written: {path}") + +def update_project(): + """Update .kicad_pro with correct board path.""" + # Read existing + if os.path.exists(PRO): + with open(PRO) as f: + config = json.load(f) + else: + config = {"board": {}} + + # Ensure board settings exist + config["board"] = config.get("board", {}) + config["board"]["design_settings"] = config["board"].get("design_settings", {}) + + with open(PRO, 'w') as f: + json.dump(config, f, indent=2) + print(f"Updated: {PRO}") + +if __name__ == "__main__": + create_readme() + create_placement_csv() + update_project() + print("\nDone! Open the project in KiCad GUI:") + print(f" File → Open Project → {PROJ_DIR}/esp32-s3-sensor-node.kicad_pro") diff --git a/gen_pcb.py b/gen_pcb.py new file mode 100644 index 0000000..e7614d6 --- /dev/null +++ b/gen_pcb.py @@ -0,0 +1,147 @@ +#!/usr/bin/env python3 +"""ESP32-S3 Sensor Node — PCB Generator v3. Tabs, like pcbnew.""" +import os +T = '\t' + +PCB = os.path.expanduser("~/Documents/KiCad/10.0/esp32-s3-sensor-node.kicad_pcb") +NETS = ["GND","3V3","VBUS","EN","IO0","IO12","SDA","SCL","USB_D_P","USB_D_N","CC1","CC2","IO2_LED","D1_A","RXD0","TXD0"] +W,H = 65.0,40.0 + +def ni(n): return NETS.index(n) if n in NETS else -1 + +def smd(n,x,y,w,h,net,rot=0): + return f'{T*4}(pad "{n}" smd rect (at {x:.3f} {y:.3f} {rot}) (size {w:.3f} {h:.3f}) (layers "F.Cu" "F.Paste" "F.Mask")' + (f' (net {ni(net)})' if ni(net)>=0 else '') + ')' + +def fp(ref,lib,x,y,rot,pads): + p = [f'{T*3}(footprint "{lib}"', f'{T*4}(layer "F.Cu")', f'{T*4}(at {x:.3f} {y:.3f} {rot})', + f'{T*4}(descr "{ref}")', + f'{T*4}(property "Reference" "{ref}" (at {x:.3f} {y-3:.3f}) (layer "F.SilkS") (effects (font (size 1 1) (thickness 0.15))))', + f'{T*4}(property "Value" "{ref}" (at {x:.3f} {y+3:.3f}) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15))))'] + p += [f'{T*4}{x}' for x in pads] + p.append(f'{T*3})') + return '\n'.join(p) + +FR = '"Resistor_SMD:R_0603_1608Metric"' +FC = '"Capacitor_SMD:C_0603_1608Metric"' +FC8 = '"Capacitor_SMD:C_0805_2012Metric"' +FL = '"LED_SMD:LED_0603_1608Metric"' +FP4 = '"Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical"' +FU = '"Connector_USB:USB_C_Receptacle_USB2.0_16P"' +FE = '"RF_Module:ESP32-S3-WROOM-1"' +FS = '"Package_TO_SOT_SMD:SOT-223-3Lead_TabPin2"' + +passives = [ + ("R1",FR,55,30,0,"IO2_LED","D1_A"), ("R2",FR,27,32,0,"EN","3V3"), + ("R3",FR,16,7,0,"IO0","3V3"), ("R4",FR,16,12,0,"IO12","GND"), + ("R5",FR,48,24,0,"SDA","3V3"), ("R6",FR,48,22,0,"SCL","3V3"), + ("R7",FR,11,28,0,"CC1","GND"), ("R8",FR,11,25,0,"CC2","GND"), + ("C1",FC,30,28,0,"3V3","GND"), ("C2",FC,30,25,0,"3V3","GND"), + ("C3",FC,30,22,0,"3V3","GND"), ("C4",FC,26,35,0,"EN","GND"), + ("C5",FC8,24,17,0,"VBUS","GND"), ("C6",FC8,24,23,0,"3V3","GND"), +] + +lines = [] +lines.append('(kicad_pcb') +lines.append(f'{T}(version 20260206)') +lines.append(f'{T}(generator "pcbnew")') +lines.append(f'{T}(generator_version "10.0")') +lines.append(f'{T}(general') +lines.append(f'{T*2}(thickness 1.6)') +lines.append(f'{T*2}(legacy_teardrops no)') +lines.append(f'{T})') +lines.append(f'{T}(paper "A4")') +lines.append(f'{T}(layers') +for n,c,t in [(0,"F.Cu","signal"),(2,"B.Cu","signal"),(13,"F.Paste","user"),(15,"B.Paste","user"), + (5,"F.SilkS","user"),(7,"B.SilkS","user"), + (1,"F.Mask","user"),(3,"B.Mask","user"), + (25,"Edge.Cuts","user"),(31,"F.CrtYd","user"),(29,"B.CrtYd","user"), + (35,"F.Fab","user"),(33,"B.Fab","user")]: + lines.append(f'{T*2}({n} "{c}" {t})') +lines.append(f'{T})') +lines.append(f'{T}(setup') +lines.append(f'{T*2}(pad_to_mask_clearance 0)') +lines.append(f'{T*2}(allow_soldermask_bridges_in_footprints no)') +lines.append(f'{T*2}(copper_edge_clearance 0.3)') +lines.append(f'{T})') + +# Nets +lines.append(f'{T}(nets') +for i,n in enumerate(NETS): + lines.append(f'{T*2}(net {i} "{n}")') +lines.append(f'{T})') + +# Net classes +lines.append(f'{T}(net_class "Default" (clearance 0.15) (trace_width 0.2) (via_dia 0.6) (via_drill 0.3) (add_net "*"))') +lines.append(f'{T}(net_class "POWER" (clearance 0.25) (trace_width 0.5) (via_dia 0.8) (via_drill 0.4) (add_net "3V3") (add_net "VBUS"))') + +# Board outline +lines.append(f'{T}(polygon (layer "Edge.Cuts")') +lines.append(f'{T*2}(pts') +lines.append(f'{T*3}(xy 0 0)') +lines.append(f'{T*3}(xy {W} 0)') +lines.append(f'{T*3}(xy {W} {H})') +lines.append(f'{T*3}(xy 0 {H})') +lines.append(f'{T*2})') +lines.append(f'{T})') + +# Footprints +# J1 USB-C +lines.append(fp("J1",FU,7,20,0,[ + smd("SH",-3,0,2,2,"GND"), smd("A1",-2,5,1.5,1.5,"GND"), + smd("A4",-2,-5,1.5,1.5,"VBUS"), smd("A5",-2,-3,1.5,0.8,"CC1"), + smd("A6",-2,-1,1.5,0.8,"USB_D_P"), smd("A7",-2,1,1.5,0.8,"USB_D_N"), + smd("B5",-2,3,1.5,0.8,"CC2"), + smd("B6",-2,0,1.5,0.8,"USB_D_P"), smd("B7",-2,2,1.5,0.8,"USB_D_N"), +])) +# U2 AMS1117 +lines.append(fp("U2",FS,20,20,0,[ + smd("1",-2.3,-3,1.5,1,"GND"), smd("2",0,3,2.5,2.5,"3V3"), + smd("3",0,-3,2.5,2.5,"VBUS"), +])) +# U1 ESP32-S3 +lines.append(fp("U1",FE,38,20,0,[ + smd("1",-8,8,1.5,1.5,"GND"), smd("2",-8,-8,1.5,1.5,"3V3"), + smd("3",-8,-6,1,1,"EN"), smd("4",-8,-4,1,1,"SDA"), + smd("5",-8,-2,1,1,"SCL"), smd("13",8,-4,1,1,"USB_D_N"), + smd("14",8,-2,1,1,"USB_D_P"), smd("20",-8,4,1,1,"IO12"), + smd("27",-8,0,1,1,"IO0"), smd("36",8,-8,1,1,"RXD0"), + smd("37",8,-6,1,1,"TXD0"), smd("38",-8,2,1,1,"IO2_LED"), +])) +# J2 I2C +lines.append(fp("J2",FP4,56,20,0,[ + smd("1",0,3.81,1.5,1.5,"3V3"), smd("2",0,1.27,1.5,1.5,"SDA"), + smd("3",0,-1.27,1.5,1.5,"SCL"), smd("4",0,-3.81,1.5,1.5,"GND"), +])) +# J3 PROG +lines.append(fp("J3",FP4,25,3,0,[ + smd("1",0,-3.81,1.5,1.5,"GND"), smd("2",0,-1.27,1.5,1.5,"RXD0"), + smd("3",0,1.27,1.5,1.5,"TXD0"), smd("4",0,3.81,1.5,1.5,"3V3"), +])) +# D1 LED +lines.append(fp("D1",FL,55,34,0,[ + smd("1",-0.8,0,0.8,0.8,"GND"), smd("2",0.8,0,0.8,0.8,"D1_A"), +])) +# Passives +for ref,lib,x,y,rot,n1,n2 in passives: + lines.append(fp(ref,lib,x,y,rot,[ + smd("1",-0.8,0.9,0.8,0.8,n1), smd("2",-0.8,-0.9,0.8,0.8,n2), + ])) + +# Zones +for layer in ["F.Cu","B.Cu"]: + lines.append(f'{T}(zone (net {ni("GND")}) (layer "{layer}")') + lines.append(f'{T*2}(polygon (pts (xy 0 0)(xy {W} 0)(xy {W} {H})(xy 0 {H})))') + lines.append(f'{T*2}(fill (mode solid))') + lines.append(f'{T})') +# Antenna keepout zones +for layer in ["F.Cu","B.Cu"]: + lines.append(f'{T}(zone (net 0) (layer "{layer}") (priority 1)') + lines.append(f'{T*2}(polygon (pts (xy 46 28)(xy {W} 28)(xy {W} {H})(xy 46 {H})))') + lines.append(f'{T*2}(fill (mode solid))') + lines.append(f'{T})') + +lines.append(')') + +result = '\n'.join(lines) + '\n' +open(PCB,'w').write(result) +print(f"Written {len(result)} bytes") diff --git a/placement.csv b/placement.csv new file mode 100644 index 0000000..9c451e7 --- /dev/null +++ b/placement.csv @@ -0,0 +1,21 @@ +Ref,Footprint,X(mm),Y(mm),Rotation,Net1,Net2 +R1,Resistor_SMD:R_0603_1608Metric,55,30,0,IO2_LED,D1_A +R2,Resistor_SMD:R_0603_1608Metric,27,32,0,EN,3V3 +R3,Resistor_SMD:R_0603_1608Metric,16,7,0,IO0,3V3 +R4,Resistor_SMD:R_0603_1608Metric,16,12,0,IO12,GND +R5,Resistor_SMD:R_0603_1608Metric,48,24,0,SDA,3V3 +R6,Resistor_SMD:R_0603_1608Metric,48,22,0,SCL,3V3 +R7,Resistor_SMD:R_0603_1608Metric,11,28,0,CC1,GND +R8,Resistor_SMD:R_0603_1608Metric,11,25,0,CC2,GND +C1,Capacitor_SMD:C_0603_1608Metric,30,28,0,3V3,GND +C2,Capacitor_SMD:C_0603_1608Metric,30,25,0,3V3,GND +C3,Capacitor_SMD:C_0603_1608Metric,30,22,0,3V3,GND +C4,Capacitor_SMD:C_0603_1608Metric,26,35,0,EN,GND +C5,Capacitor_SMD:C_0805_2012Metric,24,17,0,VBUS,GND +C6,Capacitor_SMD:C_0805_2012Metric,24,23,0,3V3,GND +J1,Connector_USB:USB_C_Receptacle_USB2.0_16P,7,20,0,SH=GND, A1=GND, A4=VBUS, A5=CC1, A6=USB_D_P, A7=USB_D_N, B5=CC2 +U2,Package_TO_SOT_SMD:SOT-223-3Lead_TabPin2,20,20,0,1=GND, 2=3V3, 3=VBUS +U1,RF_Module:ESP32-S3-WROOM-1,38,20,0,1=GND, 2=3V3, 3=EN, 4=SDA, 5=SCL, 13=USB_D_N, 14=USB_D_P, 20=IO12, 27=IO0, 36=RXD0, 37=TXD0, 38=IO2_LED +J2,Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical,56,20,0,1=3V3, 2=SDA, 3=SCL, 4=GND +J3,Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical,25,3,0,1=GND, 2=RXD0, 3=TXD0, 4=3V3 +D1,LED_SMD:LED_0603_1608Metric,55,34,0,1=GND, 2=D1_A