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Midea_ESP/VIA_SIZE_GUIDE.md
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Midea_ESP/VIA_SIZE_GUIDE.md
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# Via Size Guide for Power Traces
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**Date:** 2025-12-28
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**For:** 1mm power trace carrying 512mA (3.3V)
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---
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## Quick Answer
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**For a 1mm power trace:**
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- **Recommended via diameter:** **0.8mm**
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- **Drill size:** 0.4mm
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- **Alternative:** 0.6mm via (minimum) or use 2× vias in parallel
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---
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## Current Requirements
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- **3.3V power trace:** 1mm width
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- **Current:** 512mA peak (ESP32 + LEDs)
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- **Application:** Power distribution via
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---
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## Via Current Capacity
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### IPC-2221 Standard (Plated Through-Hole Vias)
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| Via Diameter | Drill Size | Current Capacity (1oz) | Notes |
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|--------------|------------|------------------------|-------|
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| 0.2mm (8mil) | 0.1mm | ~200mA | Too small for power |
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| 0.3mm (12mil) | 0.15mm | ~300mA | Too small for power |
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| 0.4mm (16mil) | 0.2mm | ~400mA | Minimum for 512mA |
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| **0.5mm (20mil)** | **0.25mm** | **~500mA** | **Minimum acceptable** |
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| **0.6mm (24mil)** | **0.3mm** | **~600mA** | **Good choice** |
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| **0.8mm (31mil)** | **0.4mm** | **~800mA** | **Recommended** |
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| 1.0mm (39mil) | 0.5mm | ~1000mA | Excellent, if space allows |
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---
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## Recommended Via Specifications
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### Option 1: Single Large Via (Recommended)
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```
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Via diameter: 0.8mm (31mil)
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Drill size: 0.4mm (16mil)
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Annular ring: 0.2mm (8mil) minimum
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Plating: Standard (1oz copper)
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Current: ~800mA capacity (56% margin)
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```
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**Pros:**
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- Single via, easy to place
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- Good current capacity with margin
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- Standard size, widely available
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**Cons:**
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- Slightly larger than minimum
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### Option 2: Multiple Smaller Vias (Best Practice)
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```
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Via diameter: 0.6mm (24mil) × 2
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Drill size: 0.3mm (12mil) each
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Annular ring: 0.15mm (6mil) minimum
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Total capacity: ~1200mA (2× 600mA)
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```
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**Pros:**
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- Lower resistance (parallel connection)
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- Better thermal performance
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- Redundancy if one via fails
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- Can use smaller individual vias
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**Cons:**
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- Requires more board space
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- More complex routing
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### Option 3: Minimum Size (Not Recommended)
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```
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Via diameter: 0.5mm (20mil)
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Drill size: 0.25mm (10mil)
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Current: ~500mA capacity (just enough)
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```
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**Pros:**
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- Smallest acceptable size
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- Saves board space
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**Cons:**
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- No safety margin
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- Higher resistance
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- Not recommended for power
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---
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## Via Size vs Trace Width
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### General Rule
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**For power traces:**
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- **Via diameter ≥ trace width** (preferred)
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- **Via diameter ≥ 0.8× trace width** (minimum)
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**For your 1mm trace:**
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- **Minimum via:** 0.8mm diameter
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- **Recommended via:** 0.8mm - 1.0mm diameter
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- **Best practice:** 0.8mm via or 2× 0.6mm vias
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### Why Via Should Match or Exceed Trace Width?
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1. **Current continuity:** Via should handle same current as trace
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2. **Resistance:** Larger via = lower resistance
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3. **Thermal:** Better heat dissipation
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4. **Reliability:** Less stress on via plating
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---
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## Manufacturing Considerations
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### Standard Via Sizes
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**Commonly available from PCB manufacturers:**
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| Size | Availability | Cost |
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|------|--------------|------|
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| 0.2mm | Standard | Standard |
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| 0.3mm | Standard | Standard |
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| 0.5mm | Standard | Standard |
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| 0.6mm | Standard | Standard |
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| 0.8mm | Standard | Standard |
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| 1.0mm | Standard | Standard |
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**Note:** Most manufacturers support 0.2mm - 1.0mm via sizes without extra cost.
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### Minimum Requirements
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- **Minimum via diameter:** 0.2mm (most manufacturers)
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- **Minimum drill size:** 0.1mm (laser drilling)
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- **Minimum annular ring:** 0.1mm (manufacturing tolerance)
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---
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## KiCad Via Setup
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### Setting Up Power Vias in KiCad
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1. **Via Settings:**
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- Go to: `File → Board Setup → Design Rules → Sizes`
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- Set default via size:
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- **Diameter:** 0.8mm
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- **Drill:** 0.4mm
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2. **Net Class Settings:**
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- Go to: `File → Board Setup → Design Rules → Net Classes`
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- For `Power_3V3` class:
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- **Via diameter:** 0.8mm
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- **Via drill:** 0.4mm
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3. **Routing:**
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- When routing power traces, KiCad will use the via size from net class
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- You can also manually set via size when placing vias
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### Creating Custom Via Sizes
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1. **Via Properties:**
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- Right-click via → Properties
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- Set custom diameter and drill size
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- Save as template if needed
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---
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## Best Practices
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### For Power Distribution
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1. **Use multiple vias:**
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- 2-3 vias in parallel for main power rails
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- Reduces resistance and improves reliability
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2. **Via placement:**
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- Place vias close to component pads
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- Use vias at layer transitions
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- Avoid vias in high-frequency signal paths
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3. **Via spacing:**
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- Minimum spacing: 2× via diameter
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- For power: Can be closer if needed
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4. **Thermal vias:**
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- Consider thermal vias for heat dissipation
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- Especially near power components (regulator, ESP32)
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### Example: Power Via Configuration
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```
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Main 3.3V rail (1mm trace):
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┌─────────────────┐
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│ 1mm trace │
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│ │ │
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│ ▼ │
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│ [0.8mm via] │ ← Single via
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│ │ │
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│ 1mm trace │
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└─────────────────┘
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Or better:
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┌─────────────────┐
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│ 1mm trace │
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│ │ │
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│ [0.6mm] [0.6mm]│ ← Two vias in parallel
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│ │ │
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│ 1mm trace │
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└─────────────────┘
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```
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---
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## Current Capacity Verification
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### Single 0.8mm Via
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- **Capacity:** ~800mA
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- **Required:** 512mA
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- **Margin:** 56% (excellent)
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### Two 0.6mm Vias in Parallel
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- **Capacity:** ~1200mA (2× 600mA)
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- **Required:** 512mA
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- **Margin:** 134% (excellent)
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- **Resistance:** Half of single via
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---
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## Summary
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### Recommended Via for 1mm Power Trace
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| Parameter | Value | Notes |
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|-----------|-------|-------|
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| **Via diameter** | **0.8mm** | Recommended |
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| **Drill size** | **0.4mm** | Standard |
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| **Annular ring** | **0.2mm** | Minimum |
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| **Current capacity** | **~800mA** | 56% margin |
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| **Alternative** | **2× 0.6mm** | Best practice |
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### Quick Reference
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- **1mm trace → 0.8mm via** (recommended)
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- **1mm trace → 2× 0.6mm vias** (best practice)
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- **Minimum:** 0.5mm via (not recommended, no margin)
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---
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## Design Checklist
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- [ ] Via diameter: **0.8mm** (or 2× 0.6mm)
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- [ ] Drill size: **0.4mm** (for 0.8mm via)
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- [ ] Annular ring: **0.2mm minimum**
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- [ ] Multiple vias: Consider 2-3 vias for main power rails
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- [ ] Via placement: Close to component pads
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- [ ] Manufacturing: Verify with PCB manufacturer
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---
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*Guide created: 2025-12-28*
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